Tech Talk: John Martinis, "Design of a Superconducting Quantum Computer"

John Martinis visited Google LA to give a tech talk: "Design of a Superconducting Quantum Computer." This talk took place on October 15, 2013. Bio: John M. Martinis attended the University of California at Berkeley from 1976 to 1987, where he received two degrees in Physics: B.S. (1980) and Ph.D. (1987). His thesis research focused on macroscopic quantum tunneling in Josephson Junctions. After completing a post-doctoral position at the Commisiariat Energie Atomic in Saclay, France, he joined the Electromagnetic Technology division at NIST in Boulder. At NIST he was involved in understanding the basic physics of the Coulomb Blockade, and worked to use this phenomenon to make a new fundamental electrical standard based on counting electrons. While at NIST he also invented microcalorimeters based on superconducting sensors for x-ray microanalysis and astrophysics. In June of 2004 he moved to the University of California, Santa Barbara where he currently holds the Worster Chair. At UCSB, he has continued work on quantum computation. Along with Andrew Cleland, he was awarded in 2010 the AAAS science breakthrough of the year for work showing quantum behavior of a mechanical oscillator. Abstract: Superconducting quantum computing is now at an important crossroad, where "proof of concept" experiments involving small numbers of qubits can be transitioned to more challenging and systematic approaches that could actually lead to building a quantum computer. Our optimism is based on two recent developments: a new hardware architecture for error detection based on "surface codes" [1], and recent improvements in the coherence of superconducting qubits [2]. I will explain how the surface code is a major advance for quantum computing, as it allows one to use qubits with realistic fidelities, and has a connection architecture that is compatible with integrated circuit technology. Additionally, the surface code allows quantum error detection to be understood using simple principles. I will also discuss how the hardware characteristics of superconducting qubits map into this architecture, and review recent results that suggest gate errors can be reduced to below that needed for the error detection threshold. References [1] Austin G. Fowler, Matteo Mariantoni, John M. Martinis and Andrew N. Cleland, PRA 86, 032324 (2012). [2] R. Barends, J. Kelly, A. Megrant, D. Sank, E. Jeffrey, Y. Chen, Y. Yin, B. Chiaro, J. Mutus, C. Neill, P. O'Malley, P. Roushan, J. Wenner, T. C. White, A. N. Cleland and John M. Martinis, arXiv:1304:2322.